Data Filter Cache with Partial Tag Matching for Low Power Embedded Processor

Title
Data Filter Cache with Partial Tag Matching for Low Power Embedded Processor
Author(s)
곽종욱최주희[최주희]장성태[장성태]전주식[전주식]
Issue Date
201404
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Citation
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E97D, no.4, pp.972 - 975
Abstract
Filter caches have been studied as an energy efficient solution. They achieve energy savings via selected access to L1 cache, but severely decrease system performance. Therefore, a filter cache system should adopt components that balance execution delay against energy savings. In this letter, we analyze the legacy filter cache system and propose Data Filter Cache with Partial Tag Cache (DFPC) as a new solution. The proposed DFPC scheme reduces energy consumption of L1 data cache and does not impair system performance at all. Simulation results show that DFPC provides the 46.36% energy savings without any performance loss.
URI
http://hdl.handle.net/YU.REPOSITORY/32464http://dx.doi.org/10.1587/transinf.E97.D.972
ISSN
1745-1361
Appears in Collections:
공과대학 > 컴퓨터공학과 > Articles
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