Effects of semiconductor/dielectric interfacial properties on the electrical performance of top-gate organic transistors

Title
Effects of semiconductor/dielectric interfacial properties on the electrical performance of top-gate organic transistors
Author(s)
최단비[최단비]안태규[안태규]정대성[정대성]김세현박찬언[박찬언]김유진[김유진]
Keywords
FIELD-EFFECT TRANSISTORS; THIN-FILM TRANSISTORS; DIELECTRIC ROUGHNESS; MOBILITY; MORPHOLOGY; PASSIVATION; SOLVENT; SURFACE; P3HT
Issue Date
201407
Publisher
ELSEVIER SCIENCE BV
Citation
ORGANIC ELECTRONICS, v.15, no.7, pp.1299 - 1305
Abstract
We investigated the effects of varying the properties of the interface between a semiconductor P3HT layer and a dielectric Cytop T layer on the performances of the resulting transistor devices by comparing the mobilities of devices prepared with bottom gate/bottom contact or top gate/bottom contact architectures. The reduced channel roughness that arose from the thermal annealing step dramatically enhanced the field-effect mobility, yielding the highest mobility yet obtained for a top-gate transistor: 0.12 cm(2)/V s. High-performance OFETs may be fabricated by controlling the channel roughness and the properties of the interface between the semiconductor and the gate dielectric. (C) 2014 Elsevier B. V. All rights reserved.
URI
http://hdl.handle.net/YU.REPOSITORY/31430http://dx.doi.org/10.1016/j.orgel.2014.02.026
ISSN
1566-1199
Appears in Collections:
공과대학 > 화학공학부 > Articles
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