A Generalized Loss Analysis Algorithm of Power Semiconductor Devices in Multilevel NPC Inverters

Title
A Generalized Loss Analysis Algorithm of Power Semiconductor Devices in Multilevel NPC Inverters
Author(s)
이동춘알레미파얌
Keywords
SWITCHING LOSSES; CONVERTERS; TRACTION
Issue Date
201411
Publisher
KOREAN INST ELECTR ENG
Citation
JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, v.9, no.6, pp.2168 - 2180
Abstract
In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.
URI
http://hdl.handle.net/YU.REPOSITORY/30450http://dx.doi.org/10.5370/JEET.2014.9.6.2168
ISSN
1975-0102
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공과대학 > 전기공학과 > Articles
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