Accelerating Memory Access with Address Phase Skipping in LPDDR2-NVM

Title
Accelerating Memory Access with Address Phase Skipping in LPDDR2-NVM
Author(s)
신동화박재현[박재현]이형규[이형규]장래혁[장래혁]
Keywords
WRITE
Issue Date
201412
Publisher
IEEK PUBLICATION CENTER
Citation
Journal of Semiconductor Technology and Science, v.14, no.6, pp.741 - 749
Abstract
Low power double data rate 2 non-volatile memory (LPDDR2-NVM) has been deemed the standard interface to connect non-volatile memory devices such as phase-change memory (PCM) directly to the main memory bus. However, most of the previous literature does not consider or overlook this standard interface. In this paper, we propose address phase skipping by reforming the way of interfacing with LPDDR2-NVM. To verify effectiveness and functionality, we also develop a system-level prototype that includes our customized LPDDR2-NVM controller and commercial PCM devices. Extensive simulations and measurements demonstrate up to a 3.6% memory access time reduction for commercial PCM devices and a 31.7% reduction with optimistic parameters of the PCM research prototypes in industries.
URI
http://hdl.handle.net/YU.REPOSITORY/30288http://dx.doi.org/10.5573/JSTS.2014.14.6.741
ISSN
1598-1657
Appears in Collections:
공과대학 > 컴퓨터공학과 > Articles
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