Development of an Impedance Locus Model for a Protective Relay Dynamic Test with a Digital Simulator

Title
Development of an Impedance Locus Model for a Protective Relay Dynamic Test with a Digital Simulator
Author(s)
이상봉김규호[김규호]김수남[김수남]이재규[이재규]이명수[이명수]
Issue Date
201106
Publisher
KOREAN INST ELECTR ENG
Citation
JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, v.6, no.2, pp.167 - 173
Abstract
This paper presents a method for the development of the impedance locus to test the dynamic characteristics of protective relays. Specifically, using the proposed method, the impedance locus can comprise three impedance points, and the speed of impedance trajectory can be adjusted by frequency deviation. This paper is divided into two main sections. The first section deals with the configuration of impedance locus with voltage magnitude, total impedance magnitude, and impedance angle. The second section discusses the control of the locus speed with the means of the deviation between two frequencies. The proposed method is applied to two machine equivalent systems with offline simulation (i.e., PSCAD) and real-time simulation (i.e., real-time simulation environment) to demonstrate its effectiveness.
URI
http://hdl.handle.net/YU.REPOSITORY/25139http://dx.doi.org/10.5370/JEET.2011.6.2.167
ISSN
1975-0102
Appears in Collections:
공과대학 > 전기공학과 > Articles
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