Branch Pre-Prediction: A Method for Hiding Branch Prediction Latency

Title
Branch Pre-Prediction: A Method for Hiding Branch Prediction Latency
Author(s)
곽종욱김주환[김주환]양수미[양수미]신승윤[신승윤]전주식[전주식]
Issue Date
201003
Publisher
INT INFORMATION INST
Citation
INFORMATION-AN INTERNATIONAL INTERDISCIPLINARY JOURNAL, v.13, no.2, pp.371 - 387
Abstract
Precise branch predictor has a profound impact on system performance in modern processor architectures. Recent works show that prediction latency as well as prediction accuracy has a critical impact on overall system performance as well. However, prediction latency tends to be overlooked. In this paper, we propose Branch Pre-Prediction policy to tolerate branch prediction latency. The proposed solution allows that branch predictor can proceed its prediction without any information from the fetch engine, separating the prediction engine from fetch stage. In addition, we propose newly modified BTB structure to support our solution. The simulation result shows that proposed solution can hide most prediction latency, with still providing the same level of prediction accuracy. Furthermore, the proposed solution shows even better performance that the ideal case, that is the predictor which always takes a single cycle prediction latency. In our experiments, IPC improvement is up to 10.75% and 4.09% in average, compared to conventional predictor system with prediction latency hiding technique.
URI
http://hdl.handle.net/YU.REPOSITORY/22794
ISSN
1343-4500
Appears in Collections:
공과대학 > 컴퓨터공학과 > Articles
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